VIC Circuit

Yes this is Priceless Rare Data of Stanley A Meyer and Knowledge suggest you back up all of it immediately  and share it to others. 

Vic PCB has many mini circuits on it.

Here we start to detail them

I completed most of the testing of the my build of the Analog Voltage Control Circuit (K9).  Only thing missing is the finally amplifier in the circuit which I have not received yet.  I decided to post this now as I plan on moving on to another circuit and do not expect this Q4 amplifier to change the wave train shape.  I attached the analysis and scope shots of signal as it passes through the circuit. I also attached a picture of the test setup which shows Freq Generation card K2, and Analog Voltage Generation card K8 which I used to test K9.  The scope shot shows the output from the card. This is also included in the report.  Note: Green LED on K9 is just a layout place holder for Q4.  Q4 most like will be mounted on an external Heat Sink due to it size and I believe is actually with VIC coils in real system.

I did not use any external signal sources during the testing.  Everything but power was generated on these three cards.  I did run into one problem I had to remove the 47uF capacitor on the A24 Gain Pot as it killed the signal.  Everything else worked as expected as this a fairly simple circuit and the Gain and OFF SET pots were used in the same configuration on the K8 card.  Part of the reason I removed it is this capacitor is label N/A on the K8 circuit.  With the capacitor removed the Pots do the functions described.  You can see this in screen shots in report. Sort of found this by accident as I mention in report as circuit was not working until a moved the test probe.  Then is started working until a notice a loose wire so I stopped and reset everything. Turned it back on it wasn't working again. Spent a couple of hours trouble shooting until a decide to pull the capacitor. Turns out one of things I knocked loose was the capacitor.

My guess this circuit was original setup to pass a higher frequency and block lower frequencies. Then K8 card was added. It appears to be setup on purpose to block higher frequencies as I could not get a 500Hz or higher signal through it. I believe this caused the capacitor on the gain side of that card  to be removed to allow lower frequencies through.  Now I am not sure what the correct frequency is but I did not change anything in K8 circuit.

This are more notes in my documents for these card about both these issues. Both issues caused many hours trying to figure out why the work the way they do. I expect people who understand amplifiers better than I do could give you the math why it works this way.

I think this finishes analog path with the exception of the Digital means piece and I pretty sure it just modifies pulse width of signal for accelerator operation.  As changing frequencies also does this I know pulse width changes moves through these cards with no problem.

I plan on working on cell driver circuit next as that should connect the carrier path and the gate path together on other side of primary from analog path. This is one those things I wanted to know where it was done for a long time. I thing I know how it is done now but I want to see it work.

I have completed my initial testing of bread board version of the Cell Driver Circuit K4.  The Analysis and Testing Results are attached.

As drawn with the component values listed the circuit does not work.  I had to make 2 changes. I an fairly confident that after making these 2 changes the circuit is functioning the way it is suppose to.

1) Changed the supply voltage for Q6 first 3906 in circuit from +12VDC to +5VDC as the voltage on base has a 5-volt limit. Circuit started to work after making that change.  NOTE: The Analog Voltage Generator K8 uses almost the same configuration and it use VDD +5VDC

2) Changed the 22K resister on output of Q6 to 1K.  Things initially appeared to work until I got to input to Q8 where I found there was not enough signal strength to make it function.  After doing the replacement everything else worked.

The Report has screen shots of just before and after each component in the circuit which is how I was able to identify the problems.  It also helped that I had already built and tested K8 is it has almost the same circuit in part of it so I knew what to expect.

There have been several questions posted about why resistors where chosen and why the 3906 and 2n2222 are even there.  I think I found answers to most of questions and have included that information in the report.

While I did not use the normal input (G)for the tests which comes from Phase Lock Circuit K21 (have not built that one yet)  I did use the output from the Variable Frequency Generator K2 that I built.  This signal should be fairly close to the normal signal and I tested circuit across multiple frequencies. I have attached a screen shot of output for 1Khz using a 10 ohm resistor as load, which is close to 10.5 resistance of the primary coil listed in the estate information sheet.  Screen shots of other frequencies underload are included in the report.

Still have 3 more circuits to build, I have a lot of support items but still need to order a few more things. Finished building the board and checked final out put to see if I built it correctly. The finished board appears to have less noise on the output. That is with a 10 ohm resistor as the load.

Finished testing the Resonant Scanning Circuit K22 today.

 

  I had it built a few days ago and put it aside as I had started working on testing the Phase Lock Circuit K21.  I ran into a couple issues with K21 in trying to get it to work. 

 

I thought I could at least test the voltage dividers circuit in K21 as it looked very similar in function to one in the Frequency Generator Circuit K2, but I could not get a signal out the CD4006B on pin 4. Turns out the Voltage Controlled Oscillator (VCO) that provides the signal to the voltage dividers requires Signal (F) to be present. 

 

Signal (F) is generated in this circuit so I decided to test it one before continuing with K21. This will give me a signal (F) I know and understand. 

 

I also may have burned out a couple of chips on K21 and needed to step away from it for a little while.  However, I did do enough testing and research to get a better understand of the VCO function and that signal (F) needs to provide voltage levels to the pin 9 of the CD4046B for it to generate the output frequency on pin 4.

I did find in analyzing and testing K22 is that it does not actually do the scanning that is done by K21.  What it does do is generate that the voltage control signal that the VCO needs to generate the scanning frequencies.

 

The CD4046B does all the tests to determine when systems is in resonant then sets the Lock signal (L) high to turn off the scanning control pulse being sent to output (F).  The Lock pulse when high also routes the resonant frequency on input (E) back out on signal (F) which stops the scanning process until system drops out lock, then cycle repeats.

I have written the analysis and test report but need to read and edit it a couple times, I have a lot of errors in first drafts.

 

Will post it here in a couple of days at most but wanted to a least get a screen shot of the normal scanning pulse on (F) posted here.  A31, 555 Timer, generates 12-volt clock pulses, with a wide pulse separation.

 

This means bias resistors and capacitor set the frequency of scans. This pulse train is past to A32 which turns the pulses into a 10-volt double ramp voltage pulse (ramps on both leading and training edges) with a sight pause in middle of pulse.

 

The slope of the ramps control how fast the operational frequency is scanned.  Slope is set by the feedback capacitor on A32.

 

  The result is the voltage control pulse that the VCO uses to generate the operational frequencies that are used to scan for resonance. It should be noted that the control pulses does determine the range of frequencies being scanned that is done in the CD4046B by the bias resistors and capacitors on its inputs. However, in the manual mode of operation output (F) can be used to help set those values.

Bottom line I believe K22 does what it is designed to do.  It provides one of the external functions mentioned in the data sheet for the CD4046B that supplement its ability to lock on a resonant frequency.  The VCO is just one part of that processes and K22 is a key part of configuring it to operate as desired.

I am getting closer to seeing the combined gated pulse and carrier frequency signals. Thought I found it in NOR on Input to K21.  Turned out to just be Inhibit level to CD4046B.  Looks like it is the (G) signal K21 outputs but I am not there yet though I have started testing that circuit.  Completing this circuit and testing it was another step in reaching that goal as I have another input identified and tested.

I also have the Pulser Indicator Circuit K14 built just need the 918m chip which I found on ebay and on the way (surface mount version) but I am not sure how I am going to test that one.

Report now added.

I have almost finished by testing of the Phase Lock Circuit K21. 

 

I had lots of problems with this circuit some due to lack of component values mainly on the capacitor which I have resolve.  Found posts with correct values in this forum I have a link to that in the report I am writing.  Thing I still having issues with is the (A) signal input. 

 

I can get it into the circuit but can not get the pulse past the first stage 4001.  At first I though it was because signal was not going completely low and that the Zener diode would fix this issue.  It did drop the signal offset to zero but did not solve the issue. 

 

I got side tracked working on other parts of circuit and testing other functions. I had check if signal input is high output of 4001 goes low and stops signal.  Normal state was High which is what you want for VCO to work so I went on to test and checking other things which took quite a while.  Never finished checking impact of the (A) gate. 

When I tried to do that I found I still could not get the (A) signal to switch the 4001 from high to low.  Turns out signal from K3 is not large enough to cause the 4001 to switch.  My testing shows it needs to be around 7 volts to get it to pass the gate pulse. 

 

But its only about 4.6 volts and only when I switch the 2.2K resister show on the diagram from ground to +12V.  I did get it to work with a 39 ohm resistor but that really got hot burned the marking on resistor.  Also did not like the fact that the Zener diode was letting higher voltage back to K3.

I tried dropping VDD in to 4001 to 10 volts to see what would happen - first it did not let the (A) pulse through and it also dropped output signal level (G) to 11 volts from 12 volts as the signal output level is determined by VCC.

Kind of odd that there is that much of a mismatch on signal levels.  May have the output on K3 wrong not sure but that is a 5 volt board. I know those chips do not like 12 volts it burns them out did that!  Need to solve this problem it is now last test in my testing but not sure what to do as I do not like using that small of resistor as a pull up as it pulls to much current and voltage levels are already a big issue with K21 circuit.

I do have most of the analysis and test report done just need to figure out how to test this problem before I publish it.

I added the Analysis and Test Report document and picture of the lock frequencies with Math function showing phase relation to original post. 

 

I am doing it now as I am mostly done and happy with results I have seen so far.  I will do more testing when I have time. 

 

Biggest issue that I see is getting (A) signal interface working so I can see complete (G) signal.  I think I can fix this by using part of the circuit from K8 analog voltage generator is it turns signal into 12 volts I should not need final amplifier as dealing with CMOS levels.

As far as can tell all the rest of the interfaces worked though I do want to test (H) with the real signal not just my simulated one.

I do believe the decade counters have another purpose that the PLL function as I could not find a reason for them in this circuit.  My guess would during conditioning of cell.  They provide a means of outputting other frequencies without changing operation setup.  As Ronnie mentioned higher frequencies means higher voltages so they gives means of getting different voltages at flip of the switch.

Interesting I did not find a means of setting an upper limit on frequency unless to you set one using scanning range.  You might be able to this by settle the upper limit on scanning range near resonant frequency but normal you would put the resonance frequency in the center of your scanning range.

One big thing iI did get out this testing is your are not testing for frequency but for phase relationship of the resonance frequencies.  I remember reading several discussion but phase relationship in discussions on the VIC coils and chokes.
 coils.

It also appears the voltage level of feed back signal is not a big factor as long as there is enough of a signal for system to find edges to do phasing tests.  So again  I am not sure from what I have seen is trigger to keep system from running away.

 

Only way in this circuit would to find the frequencies that are just below resonance then set the front panel pot so voltage level to VCO is always below them then lock it.  Not sure this would even work it would also mean you resonant frequency would be the very end of you scan range rather in the middle where you would normally want it.  Its possible it is being done on the analog side by setting the gain upper limit.

I am almost done building and testing the basic circuits - I have to finish testing this one and then test the Pulser Indicator circuit K14. I have built that breadboard for it just not sure how I am going to test it.

I do hope people are finding these useful.  I built circuit just to see what they do and have learned a lot in doing that.  The reports were for me as they helped define what to test and how I was going to do test. 

 

What I have found is that the report also makes a great trouble shooting tool because my testing method of capturing the signal at each point in the circuit I can go back to report to see what signal should look like at those points.  I have had to do that a couple times when I damage things. I need to stop hooking up the wrong voltage or every worse hooking up  + voltage to ground. sadly I done that more than once.

I do have some family comments coming up that will keep me away for while.  So I am not likely to get to test K14 and finishing test this board until they are done.

 

On a bread board I built everything in circuit Analog Voltage Generator Circuit K8 from input through the first 2 amplifiers Q1 and Q2 including the 2 resistors on the output of Q2.  This the part of the circuit I built.  Looks like it going to exactly what I want.  Will need to hook everything back up to test it though as I put everything away. But at least this is an easy fix if it works.

Converts 3v signal into 12v signal using 6 resistors and 2 amps.

Yellow trace is the Signal (A) out of K3
Blue trace is the output of test circuit after 1K on output before 47K pull up.

 track the Gate Pulse raised to 12V all the way through circuit from input until it reaches pin 5 on the CD4046B.  It now does what I expect as output of the first stage of 4001 now matches the input and output of second stages merges with (G) and there is a pulse sent to the inhibit input pin 5.  This pulse looks close to the (a) signal and that is what I would expect.  Before making this change it was always a flat line.

Went back to look at signal (G) which is not the combined Gate and Carrier signal. VCO generated output now has the gate pulse in it.
The good news is the signal has the Gate pulse in it the bad new system is now having a very difficult time locking. 
The bad new is that a pretty good lock is now very poor.  I expected this as Matt Watt had reporting in his testing of this circuit and new version, he is building that the gate interfered with the ability of the system to find and lock on resonance.

One thing I notice before fixing gate is that while the system is solid lock as you can see from this picture is the phasing spikes are on the leading and trailing edges and that they do not move around much but system still drops out of lock every 8 seconds.
What is interesting is that with gate in system the opposite happens.  The system only enters lock every 8 seconds then only briefly.
I did find a few articles that talked about an 8 sec problem with some PLL devices.  They were talking about using additional circuits to fix issue.  Seems to be a problem when you have a strong lock with sharp edges.  So, I am not sure this is caused by something the 4046 or by the control wave train created in K22.
 
With the gate pulse working I if a put the gate pulse on screen and trigger on it you can the gate in the (G) signal.  If you also turn on the Math function you can see the out of phase as well.  If I turned the scale on scope to show high frequencies and then adjust gate width on K3 you can see effect of gate on combined pulse train so that part of system is working the way in is described in Stan’s documentation.
Best way to see the pulse effect and is to stop the scanning control pulse is by putting K22 in manual mode and set the frequency using the Manual Freq Adjust Pot.   Now if you vary the pulse width using VIC Gating Adjust on K3 you can easily see the gate size changes.

I tried several things trying to get system to lock while gate pulse was present.  Setting the gate frequency to real low values seemed to the biggest help.  Every once in a while, you could see the frequency of the (G) signal flash on scope screen.  Most of the time frequency was below 1KHz.  I looked like it was scanning is too slow for it to get higher frequencies then a gate would appear, and it scan would continue.  Then 8 seconds would occur then a faster scan would happen, and you would see a brief lock then back to slow scan.
I tried to adjust frequency and the center point, and nothing seemed to make lock better when gate was present.  Only thing that seemed to always work is stopping the gate by either disconnection it, pulling Zener or putting on 2.2K pull down resister, basically killing inhibit functions.
I was being to believe that the scanning control wave train being created in K22 was running too slow or not formed correctly (see picture below) as there is a large gap in-between each pulse.  If you look at data sheet for 4046 it show scanning pulse to triangle wave train.  I think this is what I am see every 8 sec as this would be a fast scan.

I when to bed thinking this is a problem that needs to be fixed. I woke the next morning with a different view.  What if this is the way it is supposed to work and why.  My test of K22 shows that the scanning control pulse wave train never stops, and it is not reset.  What does happen in lock it is switched out for (E).  When lock it lost the control pulse is switched back at what every stage it is at.  So, what you have is a constantly varying signal at a fix rate, no signal for long period and then short scanning pulse and cycle repeats constantly.  If voltage increases with frequency increases and decrease when frequency decrease aren’t you in effect generate a wave that varies from 0 to max value then back to 0 on a set cycle like the AM wave in Puharick’s patent.

Assuming this is what the system is doing how would you use it?  How about using it in the condition phase and with the decade switches to step through the conditioning step up in voltage on the cell.  Keep in mind that resonant lock on the cell is not your goal at this point getting the cell to point conditioning cell is. Ronnie Walker and others say scope is jumping all over the place when then look at the signal coming out primary coil.  Maybe this is what they are seeing.

I did do a quick check of what could happen in you feed output signal (G) back into (H) to see what would happen and I got immediate lock which you expect as they are the same signal not sure what you would see with real feedback.  Will have to wait until I get more of system working with real feed to see what really happens.

In process of adding this and more screen shots of this testing to report will update the report above when I get done.

Today I decided to look at the data a different way.  I had been using a constant 5KHz signal as my (H) input which means system was trying to lock on this.  As I was thinking about this testing this is not the real case as input frequency should be close to the output frequency is fed back from signal being put into coils.

I did do a quick check of what could happen in you feed output signal (G) back into (H) to see what would happen and I got immediate lock which you expect as they are the same signal not sure what you would see with real feedback.  Will have to wait until I get more of system working with real feed to see what really happens.

Test configuration I had CH2 of scope on Pin 4 of 4046 and Pin 3 hooked to (H) input and CH1 of scope.  Note: This also gave me output of switch effect on (G) as it also feeds back into ping 3 (more on this later).

When I did this, I get solid lock with this pulse train (It stayed in solid lock for the all the rest of my testing). However, I am still seen scan cycle every 8 sec.  Found cause of this later in testing but will report where here. 

 

Check lock signal and had random spikes then decided to check (F) from K22 as I was in solid lock and should see a flat voltage except for every 8 sec. So thought must be something in K22 but then wonder why was it zero volts and (F) should be (E) when in lock.

 

  I then checked them both together and the both changed in step so K22 not source.  I also check the Lock signal and it is not changing state so something in 4046 is changing the state of (E) every 8 seconds and causing a scan.  Voltage on (E) was low as phase difference is low.

Both signals on the screen are at 10-volts then jump to 12-volt during scan.

At this point is very easy see the effect of changing the gate pulse width as signal stays in lock even during 8 second scan.  What is not easy to see is the actual frequency to the carries pulses in (s) as the frequency the gate pulses are what is picked up by scope un less you zoom so you are mostly seeing only one pulse then scope picks of the carrier frequency.

Things change when you start using the decade devices.  All the above was done at 4X which bypasses them.

Turns out this is easier to do if you use decade counters and switch.  I did this for all 3 counters and will post screen shots in report. 

This one is the 1x one discount frequency of blue trace which is (G) as it is not accurate. The Yellow trace is Pin 3.  In I zoom in even further so I am inside the decade output pulse the G is around 5KHz.

At this point I am a lot more comfortable with this circuit.  Trying to the lock test with a fixed input (H) allowed me to learn several things and was useful but it also caused some problems especially when trying to focus on lock

Using PIN 3 as source gave me solid lock and allowed to test and see other things.  In some ways closer to real system in at least frequencies where in same range but does show the phasing issues you would see in real system.

As much trouble I had seeing the carrier frequencies inside the gate signal as scope keeps trying to lock on the gate frequencies test the other side of coils is going to be interesting.

I did post updated version of Report in first post in thread.  It has all the screen shots from decade testing and using (G) feedback into pin 3 as (H).

 

  System locked when I did this so you can see effect of gate on signal. Easy to see changes to gate POT on K3 when I did this.  Also you can see effect of the decade counters.

Just need to finish hard wired board and I have that half done and test already.  That with give me 7 of the 8 boards I planned on building. 

 

Just Pulse indicator left and I already have bread board version of that already done. But really need coils to test that properly. While likely do so simple functional test mainly to check that amplifier is working.

I has been interesting and fun and I learned a lot.  Still have things to learn.  I now know what most of the controls do but not what to set them at though some like the K3 are apparent - you turn knob to far and signal goes away and LED goes out.  I also saw this in testing this circuit as this was one of the main things I want to see in this circuit.

Hardest part was get the correct name to IC to do the search.  I did the bread boards as I did not want to deal with all the work of designing a real circuit board.  However, I did redraw all circuits by hand laid out close the way I was going to build them on the bread board. 

 

That was real helpful as I built from them and used them to check both breadboard circuit and hardwire version as it was the same layout. 

 

If someone wants copies of the layouts I could always scan them in to a PDF document. 

 

They are not pretty but they were helpful. I did copy real chip layout and used that in word document to print out the chips located near where they would be and then added connections and other parts in the locations I was going to put them.

================

Pictures of finished boards.

I finished moving components for the Phase Lock board to hardwired boards. 

 

Needed 2 cards as everything would not fit on one.  I also took a couple of pictures of all eight boards together. 

 

The top 2 on right are the Pulse Indicator which I have not tested yet but this should be its final form.  The breadboard behind it in back is the circuit I built to raise (A) to 12 volt levels.

 

I will put it on one of the other boards either the Cell Driver or the Pulse Indicator as there is extra room on both.

Everything has been tested except the Pulse indicator circuit and  they all work with the few minor changes I have made where things did not work at all.  These changes are all documented in Reports I have published in here.

 

I have been using temporary cables using power plugs you see on back of boards. 

 

They work well but it is sure a mess and too easy to hook them up wrong

- managed to do that a couple of times.

After I do that it will be time to start thing about coils and a better power supply.

 scanned my working layouts and put them in the attached pdf. I had not indented to publish them in this form but they are what I used to built the bread board circuits as you need to know where the pins are located on the chips. I download pin out for each chip and then drew connections around them. 

 

After building board I double checked all connections again these drawings and also back against original circuit drawings. 

 

A lot of layout was driven by they way bread boards are made which both helped and hurt at times.  But it was an inexpensive way to get something built.

When I did testing I referenced items in report back to original circuit.

I do not have time right to do create better drawings and while I could do that it would be several days of work to do a good job.  I think I have posted pictures of all the finished boards along with report if I missed some I can go back and do that. 

 

Note:  Almost all the connections where done on the tops so I could see them and where they go though few are so close it is hard to tell. 

 

The attached drawings show chip pin connections which covers most of them.  In some cases where single point has multiple connection with either ground or power it was easier to just connect to them with multiple wires as you get the same affect.

Read the Doc Here 

Built holder for boards from 2 shelf boards as laying them out on table was taking to much room.  Wiring was mostly to route power to each board.

 

I left enough slack in wires so I could pull each board out to check it with a scope.  I was glad I did as I start to do system tests to see if everything was still working,

 

I found I had moved pot settings and needed to reset them to match setting from my initial testing. 

The scope shots in my test reports were very helpful in doing this.

Hopefully with this setup I can just connect the coils to connection strip on the end and continue testing.  One thing I do not like is the 2n3055 mounted on the leg make that whole leg to be at +12 DC.  I need to do something about that.

 

  I am still working though checking things, but I did find another issue I though I would report.  I started on the analog side and was working my way though resetting the pots and I am getting the results I expected after making the necessary adjustments until I got to the finally output to the primary coil.  Instead of the analog wave train I expect I kept getting a flatline voltage.

 

  This is from the 2N3005 (Q4 in K9 the Voltage Amplitude Control circuit).

I retraced the signal through the circuit, and everything matched until I got the final output instead of analog wave train, I got a flatline voltage. In my initial testing I did not have the output from the emitter of the 2n3005 connected to the switch and the last 1uF capacitor. 

 

The capacitor is the cause of the flatline.  Remove it and system works.  With it in you can still move the voltage level up and down but AM wave is gone. 

 

It does not make sense to have gone to all the work of creating the AM signal then remove it before sending it to primary coil.

It is possible this capacitor was intended to smooth out the noise on the AM wave as it has a lot of noise, however if this is the intended purpose 1uF is the wrong value.  However, if you want to smooth out noise on a 12-volt source then it would do that.

I am continuing to check the other boards that feed the 5KHZ side and have started to gather some of the material I need to make coils.  Looks like a should find the ferrite core first so I know what size and shape to make coils and bobbins. I know the dimensions for the areas for the wire but need to know size of hole inside bobbins.

Pictures below.  Front and back of finished boards mounted power comes in on left through a 12-volt connecter and there 2 LM317s one for 10v and on for 5v that feed bus bars on back.  Common ground through out system.  Boards powered from the bus bars.  Bus bar on the right will connect to primary and feedback coils.

The scope shots show the output of the 2n3005 with the one with capacitor in circuit and one with it removed.   This is the signal going to one side of primary coil.  The yellow trace is the 50Hz signal input used to create AM wave.  I have it on screen to provide a good sync for the scope.

Main reason I built Stan's circuits is to try to find out what that signal shape should look like.  Also I had several questions about how he did things. 

 

Where was gate generated?. How did he create the AM wave and what did it look like?  Where did he created the  high frequency pulse train? How did he merger them all together. 

 

Building his circuits and testing them has answered most these questions though with all the adjustments in the system I am still not sure what the exact signal should look like.  Still plan to do more testing to learn more.

I sure Stan did not start with these circuits but built them base on other experiments and knew what wave shape he wanted them to output. He used parts that were available at the time.

I plan to take a good look at work Nav did on AM signals and chokes to understand that part of system much better.  See his recent post on AM wave testing.

After writing this and looking at screen shots the 2 signals look the same just at different levels.  I begin to wonder if something had happened to analog signal.

 

So, I disconnected it and went back and rechecked output of board using setup I had used to check analog path.  I set scope for CH1 yellow to be 50Hz reference from K2 CH2 blue to be analog signal which was the triangle wave train, so it was working. 

 

I then hooked it back to output strip but left CH1 hooked to 50Hz reference and got the following signals.  I again varied gate size on K3.  Switching off analog gave flat line.  This was the analog signal I expected to see. 

 

Did not expect pulses on top but was glad to see them.   But they are there as all inputs to primary coil are hooked up including diodes. I am beginning to see why people say scope shots do not make a lot of sense. 

 

Would not have seen the analog wave in this form if I had not changed scope sync reference.   Note:  I used same ground reference for all of these screen shots.

As using a separate sync source gave me such a good view of the analog signal, I decided to look at the pulse stream the same way. 

 

I went back to K2 and tried all four switch settings on one of the other switches, the 500Hz output gave me the best view of the shape of the pulses. 

 

Picture was taken at about 50% gate setting.  You can also see effect of gate changes in this view.  This was taken just before diode going into Primary coil like the other pictures above.

At this point I am not sure what the output modulation frequency is as the gate messes up that reading on my scope.  I will need to go through K21 again and check center frequency I am sure it was changed when I mounted board and I have not yet tried to reset it. 

 

In this testing I was check that all the boards worked together, and primary goal was to see what signals looked like at input to primary transformer. I think I did that.

I tried to set the center of the CD4046B to 5khz.  This is kind of a pain to do with the gate active as scope syncs on the signal with gate so you cannot see the true frequency. 

 

To do this I bypassed the circuit that raises the gate level to 12-volt levels.  This leaves the gate signal present, but it never goes high so gate in not present in signal. 

(See report on K21 for more detail on this). 

 

I may put a switch on the board that has the circuit to raise it gate level so I can select the bypass mode so I can set center level.

Once I set the gate level low, I used the Manual Freq. Adjust Pot on K22 (Resonant Scanning Circuit) and the Freq.

 

Adjust Pot on K21 (Phase Lock Circuit) to set center frequency on CD4046B to 5khz.  You must set the pot on K22 to a high enough level to make adjustment to pot on K21, so you set center level this high.  I checked output of pin 4 of the CD4046B to do this. 

 

 While I was at it, I also verified that the levels out into switch from the divide by 10 chips where correct and they were.  So, I have 5khz, 500hz, 50hz and 5hz out of the switch.

My goal was to capture the input to primary coils as a known 5khz center.  I have not yet built primary and secondary coils, but I do have a 1 to 1 60hz isolation transformer so I hooked that up across the 10-ohm resistor and diode so I could see signal out of primary and secondary coils.

The screen pictures below show signal with pot setting above and gate active at 50% duty cycle.
Signal across 10-ohm resistor alone
Signal across 10-ohm resistor with transformer connected
Signal output from transformer
Signal output form transformer showing frequency sweep every 8 seconds.  As I mentioned in K21 report this sweep is present not sure why.


Have been thinking about this for a while and wonder if it is from way the sweep signal in K21 is setup (see K21 report for details).  The K21 signal looks like a piece of a triangle wave just one period with a flat line in between each period.

 

Yet the data sheet for CD4046B shows this input to be a triangle wave.  It is possible that the valves for components controlling the 555 timer on K21 are incorrect as this sets the timing of the pulse that creates the sweep wave.
Most likely will look at this some more as I had not looked at K21 input requirements when I did original K22 to testing.

Next step is to build and test some coils.  Have already started collecting parts but do not have much experience with this.

I built Stan's control circuits to see what they did. I have finished those and plan on starting to work on coils and cells.  I would like to avoid building cells at first if I could hence the questions about using capacitors.

As far as I can tell without having the VIC and cells, Stan's control circuits generate an AM  type wave in 50Hz range also a 5KHz carrier also is in range.  So the output his control circuits is very consistent with what you are reporting here.  I had started building those circuit as I was not sure how to test and tune the coils. Your explanation in here is a great help as it provides a why to do that.

I have been following your other posts and was glad to see you still working on this. I also believe using your method makes testing and understanding the coils easier to do.  The controls in Stan's circuits are extremely touchy and a change in one area requires you to make a change in another area and without knowing what you are trying to accomplish makes setting it up correctly very difficult.

On other thing I noted was I could not see anywhere in his control circuits a method to change the voltage across the coils except a switch to connect directly to a 12 volt source. When this is used much of his control circuit is by passed.  Ronnie mentioned in one his post voltage was stepped up using by raising frequency.  My guess is systems limits may be determined by using method similar to what you are doing. Then this information is used to setup the control system to stay within those limits.

Ronnie also stated that changing gap in core was to do a ruff phasing adjustment which agrees with you statement above.

from testing I have done so far that is correct.  The AM carrier frequency does not change it goes into one side of the primary transformer.  The modulation frequency does change and it go into the other side of the transformer.  The other thing that does change is the gate size which controls the number of modulation pluses on each AM pulse.
 

So it looks like the Frequency carrier goes by one path to one side of the primary coil and the analog frequency goes to the other side of the coil the analog voltage generator and control path. 

 

NOTE: Using the 4 selector switches on the front panel the two frequencies do not have to be the same and most likely are not.

The Total VIC Assembly

This is only 1 of the 14 working version. many people get lost on this version be sure to look at the assembly version map here first as there are very easy ways to use stans tech now

 

IN this version 

Here a lot of people have not understood really what Stan was doing. So it's a method for
obtaining the release of a fuel gas including hydrogen and oxygen from water, during
which the water is processed as a dielectric media in an electrical resonant circuit
 

Then he shows the cell, here, which basically consist of concentric cylinders and this
... ; but here is the circuit, and basically there is not much to at what he is saying he is
putting 50% duty cycles pulses into this transformer and creating pulses that are going
to the fuel cell winch is designed to be a capacitor.

Now, the obvious problem with this situation is this, he is using the word resonant
here, like salt and pepper all the way through.

This is not a resonant circuit, this was part of the diversion about how to keep
people, how he protected the idea without actually leading people to understand what was going on, and the proof that this is not a resonant circuit lyes in the blocking diode ! huuuuuuu gushh

so what you can see here is what he is really doing is this, this system works without electrolyte (MDG: Air being the dielectric layer to breakdown) ; so the purpose of it is, he wants his water to have a fairly high resistance in it, and so, here is what he is gona do, he got this chokes, this chokes are very important because when he puts this inductive spikes on, here, ... with the diode, what he is doing is, he is charging this capacitor, and the resonant chokes are specifically to damp the voltage spikes that could prematurely set this thing off.

So what he is doing, he is making sure that he can charge this capacitor with kind
of soft pulses and pulse the thing up, so he can get this capacitor to charge to the
maximum degree before the dielectric material, in this case water, creates a
catastrophic dielectric failure in the capacitor
At which point, all the charge in the capacitor, all the voltage in the capacitor is
converted to amps as a shorts out internally, and orderly destroys the water it
moves through and creates massive quantities of hydrogen and oxygen.
(minute 3.00 of this video)
and as soon as it's out of the way, water rushes its back in, the dielectric constant is
again re-established, and this is what's happening, while this is happening, he waits,
and starts charging again.
(showing of patent page drawing progressive water molecule stretching under pulses
train)
again this types of drawing were made to confuse people, you know the idea of
drawing this things are that these were increasingly large resonant pulses and
everything, this is all a bunch of ... , all he is doing is just like any other voltage
multiplier that's used in pulsing, all you are looking up is a step ramp charger on a
capacitor until it reaches it's catastrophic failure, that is the method of the Stan
Meyer's system, and it does produce massive amounts of gas for a very small amount
of electricity.

The Picture Below is the general Assembly  it is not 100% correct missing diode and some parts  mis placed, it is posted here because is show the general assembly  When I get time I will perfect this pic 

all the correct data is on this website.  Questions are welcomed we have these  fully replicated and working

Stan has 10 of these Paralleled making
between 20 kv and 90 kv DC  , they can also be sequentially fired or all on same time pinned to tps

Backup and yes we have 4 to 5 backups you should immediately do same download it now be warned 

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Stanley A Meyer VIC Voltage Intensifier Circuit
Note th Picture Above these note about winds may be wrong better to use the other wind numbers this picture is just for the scope shots 

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A closer explanation of the first order of function (IMO) required to hit resonance.

Reference Papers:

 

1. Electrical Efficiency of Electrolytic Hydrogen Production

2. An Investigation into the Electrical Impedance of Water Electrolysis Cells-With a View to Saving Energy

3. Hydrogen Production by Alkaline Water Electrolysis All these papers explain that Hydrogen and Oxygen gas bubbles on the surfaces of electrodes, and in the solution reduce the conductivity (increase the resistance) of the cell.

 

This is one of many methods Stan may have utilized to restrict current in the system. More methods will be discussed in future videos.

These potentiometers are pre-fixed settings.

 

"Off-Set" = initial value.

"Gain" = amount of amplification input / output

so:when you turn the ''gain '' you adjust the voltage amplitude going to the cell,

and when you turn the offset''you reset it?

"Off Set": is set to determine the beginning of the process of "gain".
'' ANL / FREQ'': only for testing purpose during the setup.
  Digital: processed in "DIGITAL CONTROL MEANS" (fig. 2).
Analog: processed in the "ANALOG VOLTAGE GENERATOR" (Fig. 3).
As the pin 3 ... 4046 this link has been modified to Minimize propagation delays.

Backup and yes we have 4 to 5 backups you should immediately do same download it now be warned 

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WHAT IS THE VIC CIRCUIT ?

 

It produces  the modulated voltage & frequency and is the driver for the vic coils

with a scanning circuit and locking circuit. it is what makes the vic system

work and keep working to generae the Gas from wet cell electrolyzer with higher yeild than normal electrolysis and runs in resonance at a certain frequency.

 

The VIC transformer performs multiple functions. 

1. voltage stepup by transformer action 
2. impedance matching 
3. amp inhibition 

Effectively, it aids transfer energy to the water capacitor and keeping the voltage up (escaping into the return circuit) until the dissociation action kicks in by charge separation. Its very difficult to articulate this without pictures. 

 

The vic driver circuit produces  precision square wave with a 50%duty cycle as the main frequency, and it has a precision adjustable gate which adjusts the unipolar pulse train on time and the gate off time, also there is a variable voltage.  

 

Included in this Circuit is a transformer arrangement SEE VIC BOBBINS with chokes on a common ferrite core.

 

The Vic Coils are tune to match the Cell style and resistance and capacitance in each case. 

NOte If you want to use the meyer circuits, then the circuit has to match the tube set of that circuit. You can not just take a circuit from the patent and just use any tube set you want on it. it does not work that way. 

Most likely if you add tube sets, the voltage is devided by each set. however, that may change once the process takes over. 

the only way to experiment with meyers stuff is to build the entire system.

Say the 8xa......circuit, inductor, full tube set and adjustable plate set........you will not get the right reaction with 2 small plates. say the 9 tube set was 5uf, the big plate set was 9uf....your little plates are 2pf........ you will not get the correct reaction with 2pf. 
There is a Method to each Patent they are not interchangable. 

now take the resonate cavity..............that vic resonates with that tube set............10 tube sets.........it will not resonate with the big tube set or 1 single cell . it has to be tube pairs, 2 tubes inner outer 1 wired +/- inner outter and one wired -+ inner outter to balance reistant load to match coils on core. 

 

Typically a gapped core serves the purpose of increasing reluctance.  In the VIC design having multiple windings dedicated to specific sides of the core, I imagine there is a need for flux separation between these two halves.  However, any gap in the core increases the reluctance of each halve as well as the complete core.  The windings that are together on each halve should have stronger coupling, but without being able to see where these are and their polarity, it is a little difficult to describe the mode of operation.

 

Seems to me that the gap could at least in part be used for balancing the resonance between the 2 chokes and the water cell.

 

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This resulting energization is applied to the VIC to create the physical gas production effects in the resonant cavity enclosure.

Modern PPL Digital radio use auto  phase lock loop to find channels or resonance. not that as the pick up coil be doin that.on one gap on one side of core only.

take the big bobbin, it is made to resonate with the injector chamber.......

it will not work with the other tube sets 

This is important to understand from the start.You have to do exactly what meyer did, and 1 tube set will not work. the only place meyer used one tube set is in the injector. 

 

  1. You will need a frequency generator that is capable of doing gating. If it does not do gating your wasting your time.

  2. Next you will need a fast switching Transistor capable of switching in the Khz range and handle several amps to turn the primary of the transformer on and off just like a switch and a few other parts on the primary side. When your switching the power from your source to the primary, it takes a certain amount of time (T1) to fill the primary inductor to the level of the source voltage.

  3. You need to be able to measure this time it takes to reach the voltage of your source. If not, your wasting your time again. You do not want anymore time other than what it takes for the primary inductor to reach your source voltage which makes the magnetic field. Any more time than that is wasted in heat and or loss and core saturation. If you ever wondered what those pulse wave forms were in his drawings on the primary side, he is showing you that it takes an amount of time and pulses to reach the source voltage in the primary and then turn it off. This is called a time constants, and they are divided into frequency pulses. He shows 5 pulses most of the time on his drawing. 

  4. You will have to do the math to get yours on your primary.

  5. Now once you have did that you will have a collapsing magnetic field which induces into the secondary inductor and through the diode because it acts as a switch and is closed due to voltage from the primary collapsing and inducing a voltage into the secondary since the diode is close the chokes are part of the secondary ratio which is also an inductor and the voltage dumped into the cell.

  6. There is a time that this takes place this is called(T2) the other pulses after the choke in his drawings))

  7. You also will have a time constant for this as well. When the cell is charged to the voltage of the secondary and the inductor chokes, due to the turn ratio of the primary and secondary and chokes.

  8. This is your gating. Gating is just the time it takes for the secondary and the chokes to charge and place a charge on the capacitor.

  9. Now when the gating is turned off and when you start the pulse to the primary again another thing happens,

  10. The diode opens and the choke inductor collapses and creates another even higher voltage into the cell.

  11. This is how you get your step charging and frequency doubling. It all has to do with T1 and T2 they have to be right on the money or you want get step charging.

  12. Of course matching the inductor and capacitor, frequency and tuning the circuit (not included) LOL All this happens in an instant of time. 

This also has a Magnetic feed back oil to the cicuit to tune resonant to allow voltage to raise rapidly.  The Switch component can be controlled by Acellerator pedal and the pickup from Pedal sensor can adjust the duty cycle and voltage to cell. 

 

The Vic voltage Intensifier Circuit was used by Stanley Meyer , in between the PWM and the Electrolyzer Cell Wet Cell. (water Capacitor)

It operated from a Switch circuit and raise the Voltage from PWM to the Electolyzer into the KV range.

 

 It has 2 Chokes which are Tuned 

to the Match plates, so matching chokes (each choke same size as each other if the plats in the electrolyzer are the same size..

 

If it is Tube Cell Electrolyzer then the choke sizes are different this inner is smaller surface are so that choke will be small to tun so both

in resonance. 

 

Meyer had 10 VIC 1 for each Cell.  This may have had 1 common PWM disving the switch for each as Cells in electrolyzers  were in series.. 

Individually power but balanced on electolyzer. 

 

The Core was 2000 Perm Ferrite core, It is a sensitive Design and work is in progress on firming the reliability of it. 

 

 

All the VIC s are based on the similar concept.

transformer, to inductors, to cell low amps higher voltage

 

Wire Size 

Stan's VIC primary is either 29 or 30 awg wire. Some people say 29 some say 30, My question is has anyone looked at the ampacity of these two wire sizes?

Ronie,as i understant stan used the same wire size for all coils.Ampacity?max curent flow?(sory my bad english).The 29awg would pulse with more curent than the 30awg.wire diameter, determines the amp flow. to many amps melts the wire

 

1. I think there are more parts that are not shown in Stan's drawings. (maybe that is why it does not work)

2. Someone told me about the missing parts in Stan's drawings.

 

3. Produce a higher voltage on the primary than 12volts using 12volts. 24 volts

( look into the design of a fly-back transformer)

 

 

4. The chokes are part of the turn ratio of the secondary.

 

5. You can not just use a frequency generator and a transistor to pulse the transformer.

 

6. Phasing the transformer is critical to getting it to work."

 

7.The VIC board only has one signal generator. It gets joined with the gate driver circuit.

 

 

The pickup coil

is used for resonate feedback to the scanning and PLL circuit that senses resonance. More or less senses the highest peek voltages and locks onto that frequency. More Below on the Phase Lock Loop Design from stanley Meyer below.

 

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is "fed back" toward the input forming a loop.

Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.

Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.

 

https://en.wikipedia.org/wiki/Phase-locked_loop

 

http://www.sentex.ca/~mec1995/gadgets/pll/pll.html

 

What is Resonance

At resonance. 

They will be no amp draw from your power source at resonance the transistor will run cold not even warm. This plainly states no amp flow in the cell. Nothing but voltage.

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This shows the amp draw from your battery or power supply at resonance. He states at startup the amp draw will be 25 m/amp and at resonance it will be 1-2 m/amp.

Also, if it entered the airspace of another country without transponder data or communication, is it possible it was shot down?

The chokes are part of the turn ratio of the secondary. Which means that the secondary turn and the choke turn are all added together for the ratio on the secondary side of the transformer. What he left out was the word (and) in between secondary charging chokes.

http://uk.mouser.com/ProductDetail/Honeywell/392JA50K/?qs=%2fha2pyFaduhDOCKt20U9cFcOvaq0S9kP20pqEwlrYeHG1yY04GUTjA%3d%3d 

 

Those pots are nice because you can lock them down so they won't move. They use a locking collar, and they are less than a 1 turn pot.

Stans voltage intensifier card

 

There are 4 chips in the bottom left quarter of the card. The bottom 2 of the 4 are CMOS chips but does anyone on the forum know the ID of the top 2?


It's part of the PLL and i'm wondering if there is a PLL chip in there or all 4 chips are part of an early flip flop style PLL?
An interesting observation is the resistor between the yellow primary and the red inductor.

 

If this is in series with the inductors and the cell then during mode 1 @ 5Khz is it acting like a shunt to get current circulating through the water and load the inductors?

 

The diode at the top is interesting, definately not a 1198 and his switching transistor is an RCA3055, going to download the PDF for that and study its harmonic distortion.

 

Really need those 2 chip codes if anyone has any ideas?

the upper one is a cd4046B pll vco,

 the next beyond is a cd4001.

 

pic added will show that in detail.
hope that helps.

 

gpssonar should have actual circuit diagram he´s working on his replication.

 

I also have a circuit diagram from 2010 because at that time I rebuilt that circuitry.

the purpose of chokes

are to limit amps. however, clearly stan called them charging chokes and speaks of a charge pump. a cell is not a charge pump. the inductors are the charge pump.....resonant charge pump...... the cell then receives that charge the only way to do that is to charge the transformer, which is how i get the step charge on the scope. the chokes are on the same core as the transformer, so they are charged when the transformer is charged the only way to see it, is to do it.......you need the setup of meyer, or simular i have giving everyone the circuit designs, that i use and don gave everyone the transformer details, and cell details 

 

The chokes are wound all in the same direction that is right and agreed to by me. But when this is said that way it really would lead people down the wrong road when they hook them to their cells. Lets look at the coils of wire in the chokes as being a spring all ready wound tight due to the primary inducing a magnetic field into them.

 

This is the example I'm going to use to show how the magnetic field inducing and collapsing. Now when they are induced they are wound tight and that is the direction of voltage (CW), on the positive choke when the field collapses and the spring unwinds and the induced voltage goes toward the cell (CCW), the way we want it to. Now on the neg. choke when it is wound tight (CW) and the field collapses (all coils wound in the same direction) will induce the voltage back into the secondary (CCW). This is something we don't want. We loose our neg. potential.

 

Now for some people, they would not know how to correct this problem. We want the induced voltage to be (CCW) and the collapsing field to go into the cell also on the neg. side(CW). So the solution is to switch the wires of the choke so the collapsing field will go into the cell (CW) so we have the same potential voltage as the positive potential going into the cell. Now we have the same voltage potential on both sides and not reflecting our neg. potential back into the secondary. I hope I got my CW AND CCW RIGHT....lol

 

Now the primary has to be phased right also or everything will go the wrong way on the secondary side. For those that knows how phasing works, the primary has to be out of phase to the secondary, the secondary is in phase with the positive choke and out of phase with the neg. choke to make a long story short in order to get the collapsing voltages to go where they need to be which is in the direction of the cell.

 

Size and tuning chokes 

 

The capacitance is determined on each inner area and outter area seperatly. The reason for this is the way the cell is charged, and the inner and outer has different surface areas and each choke has to resonated at the same frequency with each surface area. In order for it to resonate at the same frequency the cokes has to match each surface area. If you all remember the formula Stan has in his Tech Brief. It is for one surface area only. Ever wonder why the neg. choke is smaller? It's because the positive side of the cell has a larger surface area. Stan siad the the chokes had to be the same length in most of his patents, but that was for a plate cell wher both plate areas were the same and not for a cylinderical cell. His formula always threw me for a loop that he had in the Tech brief. Now after a year later, now everyone has the answer.

 

Give it a shot and you will see it works, You will have the same charge potential on both plates and also the same resonance action taking place on both surface areas. Took me a fricking year to figure this one out.

 

So if i have both chokes the same lenght the cell wil never resonate because the plate area diference?

 

Only on a plate cell with the same area on each plate. If you try to use the same inductors on a cylinder cell you will have a differece of potential voltage. I always thought they had to be the same length and same inductance also until I can across this problem and thats how I found it. Here is some numbers that you can compair it to, this is the resistance of the secondary pos choke and neg choke from don' s readings of Stan's vic!!!! Secondary=72.4 ohms, pos choke=76.7 ohms neg choke=70.1 with these numbers you can add the chokes resistance together and divide that by 2 and you will get 73.4 which is real close to the secondary resistance.

 

Even though the neg choke is smaller and the pos is larger than the secondary they still add up to the same turn ratio while balancing the potential. As you can see with these numbers all he did was took from the neg choke and added back to the positive choke while balancing the potential voltage and keeping the turn ratio the same also matching the inductance at the same time. Stan was a clever man I must admit.

 

This is very interesting. I am reviewing the tech brief. Is this what Stan was reffering to on page 1-4? It seems he knew about this interaction and used a variable choke to determine some of his operating/design characteristics. Thank you for your information. RAV EMU 

 

I think this is what he is trying to explain when he states "Dual-inline RLC Network"

Gating 

Stan states that the gate was used to tune into a resonant condition of the water's movement between the tubes.

Only one gate generator was used for all eleven tube sets.

In Don's schethes he shows pin22 on the vic card outputing to the gate circuit,every card had this output to the gate circuit?

If only one gate with one vic card was used why did he build 9?  

 

The gating circuit was used to drive all the boards at the same time. It is a manual adjusted frequency. Stan says it is used to dial into resonant action of the water between the tubes. You have LC resonance in the coils and a resonance action of the water molecule stretching and relaxing till it pulls apart.

 

the plls vco is being adjusted by the resonant feedback 
Plus, scanning circuit, (opamp integrator) 
The bilateral switch can be a simple mux (multiplexer like the 4052/3) 


If you are going off of the components and values given  PAy Attenion to detail the capacitor between pin 2 and 6 of the 741 op amp ( on the analog frequency generator) The second one away from the darlington pair driving transistor. Its value is not 47uF, but rather .47uf.Sometimes a detail here and a detail there can make quite a difference

 

The Circuit is very important to get right but the key is not the circuit, the key is a working vic coil you have to get the coil working correctly before you can use that scan, lock circuit 
nce we have matched the coils correctly with the perm of the core giving us the correct frequency of around 5khz with a applied voltage of around 14.4v & 0.03mA we should be good to go with this board? 
What about the gate card? I am thinking the VIC board will be no good with out it?!? 
What do you suggest we do?  Build our own gate card? 

stans first circuits had no pll or scanning 
mechanism, (those were probably used just to increase effeciency) 
The circuit on his rotary generator was rather primitive. Just a 555 
a few dividers and an inverter and 3 opto couplers. But a plls vco gives 
a much better quality oscillation, and it changes value over time trying to 
shift the phase of the incoming signal and comparing that to a reference 

i have the gate board, it just needs some cuts and jumpers 
but really a hand frequency gen will work just fine 
your hand is the tuner and lock 
as long as it is a fine tune adjustment.  the 9xa  was stans experimental board, you can use it for the main frequency, however, since experimenting with that circuit and the car vic circuit, i discovered that the gate needs to be more adjustable, which calls for a gate like meyer made on the car vic board. then use a transistor driver like on that epg board 

 

Notes 

In Stan's 11 cell system, the positive and negative wire of the VIC Primary Coil are both controlled by transistors.  One transistor is responsible for the pulse train, while the other transistor is responsible for the voltage amplitude.   The pulse train amplitude stays the same through out the process.  The design intent was to limit the amount of gas produced.  There was also a toggle switch to bypass the voltage amplitude transistor, and supply direct 12 Volts to always produce maximum gas output.

 

You want a high voltage in order to make the process efficient.  Example: Power Lines operate with a very high voltage.  They do so in order to minimize the losses associated with current.

So, yeah, I'd say that you can pick any voltage you want.  You just have to design your components off of that value.  Generally speaking, the higher the better.  But be careful with high voltage!!!:exclamation:

Example: take an Electrolytic capacitor.
(forget "water fuel capacitors"!!! for the time being.)
If you go over it's rated Voltage... it blows up.  Why?  It was designed to take a certain voltage.  Once you go over it.... well, anything can happen. :D

Could you explain your setup in more detail please? and what you mean by each plate has 1.8 volts? Thanks.
Kind of a quick walk through for the steps in the excel spreadsheet are as follows:
1) determine capacitance (based on your construction)
2) determine what frequency to use (just pick a number)
3) determine your inductor size. (Based on steps 1 & 2)

Now, "3)" is a little tricky.  This is a Series RLC circuit.  So, by that logic.  "3)" is equal to the sum of all of your "L" values in series.  Now, since "3)" has given us our needed TOTAL "L" value we must figure out how much goes on the "Positive side" and "Negative side."

The way gps and I were looking at it.  if you've got square plates then the inductors you need will be equal on both sides of the plates.  BECAUSE YOUR SURFACE AREA DOESN'T CHANGE. 

Furthermore, if you use two concentric cylinders your surface area on both "plates" are different. I.E. your Inductors are directly related to the amount of surface area of one of your "plates".

 

Q&A Max Miller

 

Alright, look at stans international patent and 
Look at the analog circuit. Look at the transistor, 
(the npn darlington pair) does an npn belong there? 
Is this a mistake?

the npn is fine  the circuit is fine 

I am talking about the amplifying transistors, Q5 and Q4, 
Analog circuit of the international patent.Try to draw current through an npn transistor, connecting the collector to vcc

 

i use an optocoupler to a 2n3055 
more or less a darlington pair 
the 2n3055 will handle 15 amps, the optocouple oonly passes the amps needed for the base turn on of the 2n3055 

same thing with the meyer schematic. 
the tip120 is a darlington transistor , the rest of the driver just needs to turn on the base of the tip120 
all current then passes through the tip 120, not the rest of the circuit. they are just simple transistors. with pull down resistors and bias resistors. 

 

You are just using 1 driving transistor between ground and your coil right? 
An npn works there.. Im not questioning that

 

But i find it strange that the 2n3055 (which is more of An audio transistor is used to switch, and a tip 120 
Is used for an analog function... Seems reversed

 

that 2n3055 on the heat sink of the vic is used as a voltage regulator. to manually turn the voltage up and down. the voltage control circuit is on the vic board.  so he can change the voltage into the primary up and down

 

yes the 2n3055 is used in radio amplifiers, but its just a transistor and is what it does here is simular to an amplifier. biased voltage on the base ,the tip120 is a darlington transistor which is faster then a single transistor. so the on and off pulse for the coil is fast the voltage change can be slower

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